MA2264 NUMERICAL METHODS

                                                                     Unit-1

2marks:

1)      If g(x) is continous in[a,b], then under what condition the iterative method x=g(x) has a unique solution in [a,b] ?

2)      What do you mean by error by error analysis ?

3)      Explain the term Round off error ; Truncation error .

4)      Find an iterative formula to find , where N is positive number.

5)      State the order of convergence and convergence condition for Newton-Raphson method.

6)      Derive Newton’s algorithm for finding the Pth root of a number N.

7)      Derive Newton-Raphson formula to find the cube root of a positive number K.

8)       Locate the negative root of  , approximately.

9)      Show that Newton-Raphson formula to find  (or)  can be expressed in the form  , n=0,1,2………..

10)  Establish an iteration formula to find the reciprocal of a positive number N by Newton-Raphson method ?

11)  State two difference between direct and iterative methods for solving system of equations

12)  State sufficient condition for Gauss-Jacobi method to converge.

13)  What are the elementary transforms ?

14)  Explain Gauss-Elimination method to solve AX=B.

15)  Find the dominant eigenvalue of A= by power method.

 8 marks:

1)      Newton’s method and Newton-Raphson method.

2)      Gauss Elimination method and Gauss Jordan method.

3)       Iterative method and Gauss-Seidel Iterative Method.

4)      Inverse of matrix using Gauss Jordan Method

5)      Eigen values and eigen vectors

6)      Jacobi method for symmetric matrices.

                                                                                   Unit-2

 2marks:

1)      What is the lagrange’s formula to find ‘y’ if three sets of values , are given ?

2)      Find the second degree polynomial fitting the following data

           X               1                2                4
           Y               4                5                13

 

3)      Give inverse Langrange’s interpolation formula.

4)      State Langrange’s interpolation formula.

5)      Give Newton’s divded difference interpolation formula.

6)      Talking h to be the interval of differencing, find

7)      Write the divided difference table for

            X            30             35             45              55
            Y           148             96             68              34

 

8)      Find the divided difference table for the following:

           X              1              1             4              5
          f(x)              8              11            78             123

 

9)      Given =2,=4, =4, =32, find = ?

10)  Obtain the interpolation quadratic polynomial for the given data by using Newton’s forward difference formula.

             X              0              2              4              6
             Y             -3              5              21             45

 

11)  Find ∆f(x) if +2x+2=f(x) and the interval of differencing as unity.

12)  State Newton’s formula on interpolation.

13)  Write a polynomial to calculate the value of x when

            X              3              5              7              9
            Y              6             24             58             108

 

14)  A third degree polynomial passes through (0,1),(1,-1),(2,-1) and (3,2).Find its value at x=4.

15)  Form the difference table for the following:

           X              5              6              9              11
         f(x)             12             13             15              18

 

8Marks:                                                           

1)      Lagrange’s Interpolation and inverse interpolation problem for unequal intervals.

2)      Newton’s Divided Difference problem.

3)      Cubic Spline interpolation problem.

4)      Newton’s forward and backward interpolation problem.

                                                                                        Unit-3

2marks:

1)      Find the error in the derivative  of f(x)=cos x by computing directly and using the approximation f(x)= at x=0.8 chossing h=0.01.

2)      What are the errors in trapezoidal rule of numerical integration ?

3)      Using trapezoidal rule evaluate  by dividing the range into 6 equal parts.

4)      What is the order of error in trapezoidal rule ?

5)      What is the Geometric interpretation of trapezoidal rule  ?

6)      State trapezoidal rule to evaluate

7)      What are the errors in Simpson’s rules of numerical integration ?

8)      In order to evaluate by Simpson’s  rule as well as by Simpson’s  rule ,what is the restriction on the number of intervals ?

9)      Using Simpson’s rule,find  given that ,.

10)  When does Simpson’s rule give exact result ?

11)  State Simpson’s three-eighth’s  rule.

12)  State Simpson’s one-third rule.

13)  State three point Gaussian quadrature formula to evaluate

14)  Write the formula for evaluating double integrals using Trapezoidal method.

15)  Write the formula for evaluating double integrals using Simpson’s method.

8marks:

1)      Forward and Backward difference problems to compute the derivatives

2)      Simpson’s 1/3 and 3/8 rule.

3)      Trapezoidal rule and Evaluation of Double Integrals using Trapezoidal & Simpson’s rule.

4)      Romberg’s Method.

5)      Gauss two point and three point problems

                                                                             Unit-4

2marks:

1)      By Taylor’s series method ,find y(1.1) given  ,y(1)=0.

2)      Compute y(0.1) by Taylor’s series method to three places decimals given that  ,y(0)=1.

3)      Write the merits and demerits of Taylor’s series method of solution.

4)      Using modified Euler’s method ,find y(0.1) if  ,y(0)=1.

5)      State modified Euler’s algorithm to solve .

6)      Solve  to find y(0.01) using Euler’s method.

7)      Write down the formula to solve 2nd order differential equation using Runge-Kutta method of 4th order.

8)      Compare Taylor series and Runge-Kutta method.

9)      What are the advantages of Runge-Kutta method over taylor method ?

10)  Give the formula for second order Runge-Kutta method .

11)  Using Runge-Kutta method of second order find y(0.1),when )=1.

12)  Write Milner’s Predictor –corrector formula.

13)  What is the condition to apply Adams-Bashforth method ?

14)  State Adams-Bashforth Predictor – corrector formula to solve  numerically stating the assumptions.

15)  Explain the meaning of explicit and implicit methods in numerical calculations.

8marks:

1)      Taylor series method

2)      Improved  Euler method and Modified Euler’s  method.

3)      Runge-Kutta method.

4)      Milne’s Predictor- Corrector method

5)      Adam’s Bashforth Predictor-Corrector Method.

                                                                          Unit-5

2marks:

1)      What is the error for solving Laplace and Poisson’s equations by finite difference method ?

2)      Obtain the finite difference scheme for the difference equation 2

3)      State finite difference scheme of

4)      Define a difference quotient.

5)      State finite difference form of

6)      Classify the equation

7)      Write down the Bender-Schmidt recurrence relation for one dimensional heat equation.

8)      Write the Bender-Schmidt recurrence relation for .

9)      Write an explicit formula to solve  numerically.

10)  Write the Crank-Nicholson difference scheme to solve  with u(0,t)= and u(x,o)=f(x).

11)  Write diagonal five- point formula to solve the laplace equation .

12)  state standard five- point finite difference formula for solving .

13)  Write the five- point formula to solve .

14)  State the difference equation that approximate elliptic equation.

15)  Write the difference scheme for solving the Laplace’s equation.

8marks:

1)      Problems based on finite difference method

2)      Problems on One Dimensional and Two Dimensional Heat E quations.

3)      Problems on One Dimensional Wave equation.

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CS2353 OBJECT ORIENTED ANALYSIS AND DESIGN

UNIT-1 INTRODUCTION TO OOAD

2 MARKS:

  1. Object
  2. Advantages of OOD
  3. OO system development methodology
  4. OOAD
  5. UML
  6. Goals of UML
  7. UP
  8. Iterations
  9. Iterative development and evolutionary development
  10. Phases of UP
  11. Inception
  12. Use case modeling
  13. Use case generalization

16 MARKS:

  1. UP phases with suitable diagrams
  2. Use case modeling to describe functional requirements
  3. Include and extend relationships

 

 

UNIT-2 ELABORATION

2 MARKS:

  1. Elaboration
  2. Conceptual classes
  3. Description classes
  4. Attributes
  5. Associations
  6. Derived attributes
  7. Conceptual super classes and sub classes
  8. Generalization
  9. Aggregation
  10. Compositon
  11. Activity diagram

16 MARKS:

  1. Strategies to identify conceptual classes
  2. Associations and attributes
  3. Domain model refinement
  4. Activity diagrams

 

 

UNIT-3 SYSTEM SEQUENCE DIAGRAMS

2 MARKS;

  1. System sequence diagram
  2. Logical architecture
  3. Layer
  4. Class diagrams
  5. Design class diagram
  6. Classifier
  7. UML operation ,methods and keywords
  8. UML properties and property strings
  9. Association class
  10. Sequence diagram
  11. Communication diagram
  12. Strengths and weakness of sequence vs communication diagram

16 MARKS:

  1. System sequence diagrams with its notations.
  2. Relationship between system sequence diagrams and use case diagram
  3. Class diagram and its notation
  4. Interaction diagram

 

 

UNIT-4 GRASP: DESIGNING OBJECTS WITH RESPOPNSIBILITES

2 MARKS:

  1. GRASP
  2. Responsibility driven design
  3. Responsibilities
  4. Pattern
  5. GRASP Pattern
  6. Applying GRASP patterns
  7. Creator
  8. Controller
  9. Low coupling
  10. High cohesion
  11. Information expert
  12. Singleton pattern
  13. Adapter pattern
  14. Observer pattern

16 MARKS:

  1. GRASP patterns
  2. GoF patterns

 

 

 

 

UNIT-5 INTRODUCTION TO OPERATING SYSTEM

2 MARKS:

  1. UML state machine diagram
  2. Events
  3. States
  4. State independent and state dependent
  5. Operation contract
  6. Deployment diagram
  7. Component diagram
  8. Layered architecture

16 MARKS:

  1. Mapping designs to code
  2. Deployment and component diagram
  3. State chart diagram.
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CS2354 ADVANCED COMPUTER ARCHITECTURE

UNIT-1 INSTRUCTION LEVEL PARALLELISM

TWO MARK QUESTION:

1. Expand ILP?

2. What is called instruction parallelism?

3. What are the approaches to exploit ILP?

4. What is peipelining?

5. Write down the formula to calculate the pipeline CPI?

6. What is called Loop level parallelism?

7. Given the methods to enhance performance of  ILP?

8. List out the types of dependences?

9. When is an instruction said to be dependent?

10. When does name dependence occur?

11. Brief on data dependence?

12. Define register renaming?

13. What is data hazard?

14. Give the classification od data hazards?

15. What is control dependence?

16. List out the constraints imposed by control dependences?

17. What are the properties used for preserving control dependence?

18. What is data flow?

19. define dynamic scheduling?

20. List the advantages if dynamic scheduling?

21. Give the idea of dynamic scheduling?

22. When an exception is said to be imprecise?

23. Why does the imprecise exception occur?

24. What are the three stages of tomasulo algorithm?

25. What are the components of hardware based speculation?

26. What is reorder buffer?

27. List out the fields in each ROB entry?

28.what is loop unrolling?

29.what are the benefits of speculating through multiple branches?

30.what is multiple issues?

31.what re abasic ideas pipeline scheduling?

32.why do we need branch prediction?

33.what are the strategies of branch predictor?

16mark question:

1.basic compiler techniques for exposing ILP

2.dynamic scheduling?

3.concepts and challenge of ILP

UNIT-2 MULTIPLE ISSUE PROCESSOR

TWO MARKS:

1.VLIW

2.Responsibilities of VLIW

3.Advantages of VLIW processor

4.EPIC

5.loop level analysis

6.classification date dependence in loops?

7.loop carried dependence?

8.not loop carried dependence?

9.when is loop level said to be parallel?

12.recurrence?

13.dependence analysis algorithm?

14.when an array index is said to be index?

15.copy propagation?

16.tree height reduction technique?

17.components of software pipeline loop?

18.Trace scheduling

19.Steps used for trace scheduling

20.How are the super blocks formed?

21.Tail duplication do?

22.Conditional moves used

23.Limitation of predicted insructions

24.IA-64 processor

25.Components of IA-64 register model

26.Register stack mechanism?

27.CFM

28.Use of CFM pointer

29.Types of register and its purpose?

30.Benefits of register rotation?

16mark question:

1.advanced compiler support for exposing and exploiting ILP

2.hardware support for exposing parallelism

3.hardware vs software speculation mechanism(8)

4.limits on ILP (8)

UNIT-3 MULTIPROCESSOR AND THREAD LEVEL PARALLELISM

TWO MARKS:

1.parallel computers?

2.idea of using multiple processors?

3.categories of Flynn’s taxonomy of parallel machines

4.SMP

5.distributed memory multiprocessor

6.components of distributed memory multiprocessor

7.Benefits of distributed memory multiprocessor

8.Advantages of distributed memory multiprocessor

9.Drawbacks of distributed memory multi processor

10.Distributed shared memory

11.Address space said to be shared

12.Message passing multiprocessor

13.Multiple address space

14.Types of message passing

15.Synchronous message passing

16.Asynchronous message passing

17.Performance metrics for communication mechanisms

18.Write down the formula to calculate communication latency

19.Amdahl’s law

20.Challenge of parallel processing

21.Symmetric shared memory architectures

22.Types of data cached in shared memory machines

23.Cache coherence

24.Coherent memory system

25.Memory system achieving coherent state

26.Coherence

27.Consistency

28.Cache coherence protocols

29.List out the classes of protocols

30.Directory based protocol

31.Snooping

32.What is write invalidate protocol

33.What is wrute update protocol

34.Spin locks

35.Which mechanism is used to implement spin lock

36.When is spin lock is used

37.How will be the coherence protocol is implemented

38.List out the responsibilities of controller

39.Coherency misses

40.Types of coherency misses

41.List out the techniques for implementinf the spin locks

42.Exponential backoff

43.How does a queuing lock work?

44.Consistency

45.Multithreading

46.Approaches of multithreading

16.mark question:

1.symmetric shared memory architecture

2.distributed shared memory architecture

3.multi threading(8)

4.relaxed consistency model(8)

UNIT4- MEMORY AND I/O

TWO MARK QUESTION:

1.Memory hierarchy

2.Advantage of memory hierarchy

3.Cache

4.Cache hit

5.Cache miss

6.Factors on which the cache miss depends on

7.Latency determine

8.Bandwidth determine

9.Principle of locality

10.Types of locality

11.Page fault error

12.Write down the formula to calculate cpu execution time

13.Memory stall cycles

14.Miss penalty

15.Average memory access time

16.Techniques to reduce the miss penalty

17.Technique to reduce the miss rate

18.Technique to reduce hit time

19.Technique used for improving bandwidth

20.Storage devices

21.Tracks

22.Sector

23.Sequence recorded

24.Constant bit density

25.Seek

26.Seek time

27.Average seek time

28.Rotational latency or rotational delay

29.Transfer time

16MARK QUESTION:

1.Reducing cache miss penalty,miss fail and hit time

2.Raid level

UNIT5: MULTI CORE ARCHITECTURES

TWOMARKS QUESTION:

1.Software multithreading

2.Hardware multithreading

3.Difference between software and hardware multithreading

4.Approaches in hardware multithreading

5.Simultaneous multithreading

6.Features exploit by SMT

7.Design challenge of SMT

8.Performance of SMT are improved

9.CMP

10.Chip multithreading

11.Multicore micro processor

12.Heterogeneous multicore processor

13.Advantange of heterogenous multi core processor

14.Disadvantage of heterogeneous multi core processors

15.IBM cell processor

16.Components used in IBM cell architecture

17.Components of PPE

18.Function of PPU

19.Function of PPSS

20.Intel core micro architecture

21.Block diagram of SPE

22.Components of SPE

23.Function of SPU

24.Memory flow controller

16MARK QUESTION:

1.IBM cell processor

2.SUN CMP architecture

UNIT-1 INSTRUCTION LEVEL PARALLELISM

TWO MARK QUESTION:

1. Expand ILP?

2. What is called instruction parallelism?

3. What are the approaches to exploit ILP?

4. What is peipelining?

5. Write down the formula to calculate the pipeline CPI?

6. What is called Loop level parallelism?

7. Given the methods to enhance performance of  ILP?

8. List out the types of dependences?

9. When is an instruction said to be dependent?

10. When does name dependence occur?

11. Brief on data dependence?

12. Define register renaming?

13. What is data hazard?

14. Give the classification od data hazards?

15. What is control dependence?

16. List out the constraints imposed by control dependences?

17. What are the properties used for preserving control dependence?

18. What is data flow?

19. define dynamic scheduling?

20. List the advantages if dynamic scheduling?

21. Give the idea of dynamic scheduling?

22. When an exception is said to be imprecise?

23. Why does the imprecise exception occur?

24. What are the three stages of tomasulo algorithm?

25. What are the components of hardware based speculation?

26. What is reorder buffer?

27. List out the fields in each ROB entry?

28.what is loop unrolling?

29.what are the benefits of speculating through multiple branches?

30.what is multiple issues?

31.what re abasic ideas pipeline scheduling?

32.why do we need branch prediction?

33.what are the strategies of branch predictor?

16mark question:

1.basic compiler techniques for exposing ILP

2.dynamic scheduling?

3.concepts and challenge of ILP

UNIT-2 MULTIPLE ISSUE PROCESSOR

TWO MARKS:

1.VLIW

2.Responsibilities of VLIW

3.Advantages of VLIW processor

4.EPIC

5.loop level analysis

6.classification date dependence in loops?

7.loop carried dependence?

8.not loop carried dependence?

9.when is loop level said to be parallel?

12.recurrence?

13.dependence analysis algorithm?

14.when an array index is said to be index?

15.copy propagation?

16.tree height reduction technique?

17.components of software pipeline loop?

18.Trace scheduling

19.Steps used for trace scheduling

20.How are the super blocks formed?

21.Tail duplication do?

22.Conditional moves used

23.Limitation of predicted insructions

24.IA-64 processor

25.Components of IA-64 register model

26.Register stack mechanism?

27.CFM

28.Use of CFM pointer

29.Types of register and its purpose?

30.Benefits of register rotation?

16mark question:

1.advanced compiler support for exposing and exploiting ILP

2.hardware support for exposing parallelism

3.hardware vs software speculation mechanism(8)

4.limits on ILP (8)

UNIT-3 MULTIPROCESSOR AND THREAD LEVEL PARALLELISM

TWO MARKS:

1.parallel computers?

2.idea of using multiple processors?

3.categories of Flynn’s taxonomy of parallel machines

4.SMP

5.distributed memory multiprocessor

6.components of distributed memory multiprocessor

7.Benefits of distributed memory multiprocessor

8.Advantages of distributed memory multiprocessor

9.Drawbacks of distributed memory multi processor

10.Distributed shared memory

11.Address space said to be shared

12.Message passing multiprocessor

13.Multiple address space

14.Types of message passing

15.Synchronous message passing

16.Asynchronous message passing

17.Performance metrics for communication mechanisms

18.Write down the formula to calculate communication latency

19.Amdahl’s law

20.Challenge of parallel processing

21.Symmetric shared memory architectures

22.Types of data cached in shared memory machines

23.Cache coherence

24.Coherent memory system

25.Memory system achieving coherent state

26.Coherence

27.Consistency

28.Cache coherence protocols

29.List out the classes of protocols

30.Directory based protocol

31.Snooping

32.What is write invalidate protocol

33.What is wrute update protocol

34.Spin locks

35.Which mechanism is used to implement spin lock

36.When is spin lock is used

37.How will be the coherence protocol is implemented

38.List out the responsibilities of controller

39.Coherency misses

40.Types of coherency misses

41.List out the techniques for implementinf the spin locks

42.Exponential backoff

43.How does a queuing lock work?

44.Consistency

45.Multithreading

46.Approaches of multithreading

16.mark question:

1.symmetric shared memory architecture

2.distributed shared memory architecture

3.multi threading(8)

4.relaxed consistency model(8)

UNIT4- MEMORY AND I/O

TWO MARK QUESTION:

1.Memory hierarchy

2.Advantage of memory hierarchy

3.Cache

4.Cache hit

5.Cache miss

6.Factors on which the cache miss depends on

7.Latency determine

8.Bandwidth determine

9.Principle of locality

10.Types of locality

11.Page fault error

12.Write down the formula to calculate cpu execution time

13.Memory stall cycles

14.Miss penalty

15.Average memory access time

16.Techniques to reduce the miss penalty

17.Technique to reduce the miss rate

18.Technique to reduce hit time

19.Technique used for improving bandwidth

20.Storage devices

21.Tracks

22.Sector

23.Sequence recorded

24.Constant bit density

25.Seek

26.Seek time

27.Average seek time

28.Rotational latency or rotational delay

29.Transfer time

16MARK QUESTION:

1.Reducing cache miss penalty,miss fail and hit time

2.Raid level

UNIT5: MULTI CORE ARCHITECTURES

TWOMARKS QUESTION:

1.Software multithreading

2.Hardware multithreading

3.Difference between software and hardware multithreading

4.Approaches in hardware multithreading

5.Simultaneous multithreading

6.Features exploit by SMT

7.Design challenge of SMT

8.Performance of SMT are improved

9.CMP

10.Chip multithreading

11.Multicore micro processor

12.Heterogeneous multicore processor

13.Advantange of heterogenous multi core processor

14.Disadvantage of heterogeneous multi core processors

15.IBM cell processor

16.Components used in IBM cell architecture

17.Components of PPE

18.Function of PPU

19.Function of PPSS

20.Intel core micro architecture

21.Block diagram of SPE

22.Components of SPE

23.Function of SPU

24.Memory flow controller

16MARK QUESTION:

1.IBM cell processor

2.SUN CMP architecture

 

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